IEEE Photonics Society

Boston Photonics Society Chapter

Boston Chapter of the IEEE Photonics Society

Integrated Photonic Technologies Workshop PDF

Wednesday, April 1, 8, 15, 22, 29 2015, 7:00–9:30 PM
Located at MIT Lincoln Laboratory – 244 Wood Street, Lexington, MA, 02420, USA

Wednesday
April 22, 2015
7 PM
 

Add to Calendar Add to Calendar

CMOS Photonics: Monolithic Integration of 70 Million Electronic and Photonic Devices Slides

Prof. Rajeev Ram, Massachusetts Institute of Technology, Cambridge, MA

 

Prof. Rajeev Ram, Massachusetts Institute of Technology, Cambridge, MA

Abstract:  Here, I review the progress made towards building systems utilizing CMOS electronics and photonics fabricated simultaneously within a state-of-the-art CMOS manufacturing flow.  I will focus primarily on the recent results of devices and systems resulting from an on-going collaboration between my group (the Physical Optics and Electronics Group) at MIT, Vladimir Stojanovic’s Group at UC Berkeley, Milos Popovic’s Group at the University of Colorado at Boulder, and Micron Technologies.  Recently, we have successfully demonstrated monolithic integrated electronic-photonic integration of transmitters (modulators and drive electronics) and receivers (photodetectors and circuits) in both foundry silicon-on-insulator processes as well as custom bulk CMOS processes.


Zero-change silicon-on-insulator CMOS photonics has been demonstrated using the IBM 45nm SOI platform.  This unmodified platform is used for a wide range of products from supercomputers to servers to gaming consoles.  Our team has demonstrated high-performance resonant modulators utilizing the crystalline (body) silicon as a waveguide laye [Wade 2014, Shainline 2013].  The low capacitance of this structure results in a low-energy per bit of < 5fJ/bit for the optical modualtor.  When driven with a CMOS driver, the total energy consumption for the transmitter block is 20 fJ/bit at 2 Gbps [Georgas 2014].  To the best of our knowledge, this is the lowest energy consumption for an integrated transmitter.  The receiver in this chip is realized by exploiting interband absorption in the SiGe p-doped strain layers.  These are the first waveguide infrared photodetecotrs implemented in a zero-change CMOS process.  The detectors are coupled to an on-chip transimpedance amplifier and digital sense amplifier circuits.  The total power dissipation for the receiver is 220 fJ/bit at 2 Gbps [Georgas 2014].


Because of pricing sensitivity in a very competitive market, DRAM is fabricated only in bulk CMOS processes.  Hence, the transmitter and receiver must be fabricated from a polysilicon layer that is deposited on a deep trench oxide [Meade 2014].  A complete photonic link has been demonstrated at 5 Gbps that transfers digital information from one Bulk CMOS Photonics chip to another [Sun 2014].  A single-polysilicon deposition were used to simultaneously define the transistor gate, the low-loss waveguides, the depletion modulators, and the photodetectors.  The process was finely tuned to adjust the density of localized electronic states associated with the grain-boundaries in polysilicon.  A low-defect state density was utilized for the waveguide and modulator layers.  This defect state density could be tuned to be higher for the all-silicon photodetectors.  The resulting microring resonant detectors exhibit a 20% quantum efficiency with 9.7 GHz bandwidth over a wide range of wavelengths [Mehta 2014].


The applications for such CMOS photonics are wide-ranging.  The CMOS Photonics developed within the IBM foundry (using Silicon on insulator) could drive cost and performance in virtually every area of application where optical input/output could be important: telecommunications, data center interconnection, sensing, etc.  This technology is portable as similar SOI manufacturing processes exist at other fabs such as Global Foudnaries and ST Microelectronics.   The CMOS Photonics developed in collaboration with Micron is potentially the lowest cost photonics process developed, to date.  It utilizes a less expensive bulk Silicon wafers and offers a transition path for TSMC and others to offering photonic functionality.  Applications could include speed-up of applications ranging from graphics processors (GPU) to FPGA – each multi-billion dollar markets constrained by data interconnection.


References:

M. Wade, et al.  Optical Fiber Conference, 2014.

J. Shainline, et al. Optics Letters, 2013

M. Georgas, et al.  VLSI Symposium, 2014.

R. Meade, et al. VLSI Symposium, 2014

C. Sun, et al. VLSI Symposium, 2014

K. K., Mehta, et al.  Optics Letters, 2014

 

Biography:  Rajeev has worked in the areas of physical optics and electronics for much of his career.  In the early 1990’s, he developedthe III-V wafer bonding technology that led to record brightness light emitting devices at Hewlett-Packard Laboratory in Palo Alto.  While at HP Labs, he worked on the first commercial deployment of surface emitting lasers.  In the early 1990’s, he developed the first semiconductor laser without population inversion, semiconductor lasers that employ condensation of massive particles, and threshold-less lasers.


Joining the MIT Electrical Engineering and Computer Science Department as professor of electrical engineering in 1997, Ram has been principal investigator in MIT’s Research Laboratory of Electronics (RLE) and heads the Physical Optics and Electronics Group at RLE.  Ram has served on the Defense Sciences Research Council advising DARPA on new areas for investment and served as a Program Director at the newly founded Advanced Research Project Agency-Energy.   At ARPA-e, he managed a research portfolio exceeding $100M and consulted with the Office of Science and Technology Policy and the White House.  Ram was selected in 2010 as one of MIT’s four MacVicar Faculty Fellows, the Institute’s highest honor for outstanding undergraduate teaching.  He is a Fellow of the Optical Society of America.

 


For more information on the technical content of the workshop, contact either:
1) Jonathan Klamkin (klamkin@bu.edu), Workshop Committee Co-Chair
2) Keisuke Kojima (kojima@merl.com), Workshop Committee Co-Chair
3) Reuel Swint (swint@ll.mit.edu), Workshop Committee Co-Chair
4) Jade Wang (jpwang@ll.mit.edu), Boston Photonics Society Chair