IEEE Photonics Society

Boston Photonics Society Chapter

Boston Chapter of the IEEE Photonics Society

Laser Control of Individual Atoms Workshop PDF

Wednesday, October 12, 19, 26, November 2, 9, 2011, 7:00–9:30 PM
Located at MIT Lincoln Laboratory – 244 Wood Street, Lexington, MA, 02420, USA

Wednesday
November 9, 2011
7 PM
 

Add to Calendar Add to Calendar

Realistic Trapped-Ion Quantum Processing for Enhanced Computation, Simulation, and Sensing: Addressing Challenges to Scaling Up Processor Speed, Size, and Fidelity Slides

Dr. John Chiaverini, MIT Lincoln Laboratory, Lexington, MA

 

Dr. John Chiaverini, MIT Lincoln Laboratory, Lexington, MA

Abstract:  Quantum information processing promises significant improvements to computing and sensing, and there are currently several possible implementation technologies under development.  Of these, atomic ions trapped, cooled, and manipulated with electromagnetic fields are leading candidates, with high-fidelity quantum algorithms demonstrated in systems of several ion-quantum-bits.  Ion internal electronic states have long-lived quantum coherence (seconds or more), many orders of magnitude longer than the quantum-logic-gate times achieved, and gate errors are approaching the level required for large-scale fault-tolerant quantum processing.  Trapped ions thus have the potential to be the basis of the first quantum computers, making possible quantum simulators for basic physics, materials science, and chemistry problems, and they may also enable enhanced precision quantum sensors for many signals of interest.  However, current systems must scale up in number of ion-qubits simultaneously trapped and manipulated, as well as scale down in terms of ion-electrode distances to achieve faster, more robust operation, all while increasing the operation fidelity to achieve fault-tolerance.  There are many algorithmic, engineering, and fundamental physics challenges to overcome to reach the goal of a useful, deployable ion processor, and current work across the field addresses these directions simultaneously.  I will focus on the recent advancements and future directions in trapped-ion technology such as the development of optics and electronics integration for enhanced speed and trap complexity.  I will also describe studies of the basic interactions that currently limit ion processor performance, including investigations of operation fidelity as a function of trap surface properties, electrode configuration, and the electromagnetic noise environment, as well as methods to address these limitations.

 

Biography:  John Chiaverini received his B.S. in physics from Case Western Reserve University where he studied the experimental growth dynamics of solid helium crystals.  His Ph.D. research at Stanford University explored non-Newtonian gravity at small length scales and was based on a microcantilever Cavendish-style experiment.  This work was one of the first to put stringent bounds on novel gravity effects at the 10-100 micron length scale.  He did postdoctoral work at NIST in Boulder, where he implemented quantum algorithms such as quantum teleportation and the quantum Fourier transform in systems of trapped ions, while also developing a novel surface-ion-trap technology for more straightforward microfabrication and integration.  He then took a staff position in the Physics Division at Los Alamos National Lab where he further developed ion-trap integration technologies for quantum simulation.  For the last two years, John has been a member of the technical staff at MIT Lincoln Lab, and his current research interests include cryogenic neutral-atom and ion trapping for quantum computing and sensing, precision measurement, and quantum simulation.

 


For more information on the technical content of the workshop, contact either:
1) Farhad Hakimi (fhakimi@ieee.org), Workshop Committee Chair
2) William Nelson (w.nelson@ieee.org), Workshop Committee Co-Chair
3) Robert Stephenson (Robert.Stephenson@ieee.org), Boston Photonics Society Chair